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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-27401-4E
ASSP
Power Supply Monitor with Watch-Dog Timer
MB3773
s
DESCRIPTION
The Fujitsu MB3773 is designed to monitor the voltage level of a power supply (+5V or an arbitrary voltage) in a microprocessor circuit, memory board in a large-size computer, for example. The MB3773 also contains a watch-dog timer function to detect uncontrol. Table status of processor and reset system/processor. If the circuit's power supply deviates more than a specified amount, then the MB3773 generates a reset signal to the microprocessor. Thus, the computer data is protected from accidental erasure. When the MB3773 does not receive the clock pulse from the processor in the specified period, the MB3773 generates a reset signal to the mciroprocessor. Using the MB3773 requires few external components. To monitor only a +5 volt supply, the MB3773 requires the connection of one external capacitor. The MB3773 is available in an 8-pin Dual In-Line package space saving Flat Package, or a Single In-Line Package. *Precision voltage detection (VS = 4.2V 2.5%) *Threshold level with hysterisis *Low voltage output for reset signal (VCC = 0.8V typ.) *Precision reference voltage output (VREF = 1.245 V1.5%) *External clock monitor and reset signal generator *Negative-edge input watch-dog timer *Minimal number of external components (one capacitor min.) *Available in a variety of packages * 8-pin Dual In-Line Package * 8-pin Flat Package * 8-pin Single In-Line Package PLASTIC PACKAGE SIP-8P-M03 PLASTIC PACKAGE FPT-8P-M01 PLASTIC PACKAGE DIP-8P-M01
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
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MB3773
s
PIN ASSIGNMENT
8 7 CT RESET CK GND 1 2 Top View 3 4 6 5 VREF VCC 8 7 RESET VS Front View 6 5 4 3 2 (DIP-8P-M01) (FPT-8P-M01) 1
RESET VS VREF VCC GND CK RESET CT
(SIP-8P-M03)
s
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol VCC VS Rating -0.3 to +18 -0.3 to VCC +0.3 (+18) -0.3 to +18 -0.3 to VCC +0.3 (+18) 200 -55 to +125 Unit V V V V mW C
Supply voltage Input voltage
VS RESET, RESET Supply voltage Power dissipation(Ta 85C) Storage temperature
NOTE:
VOH PD TSTG
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
MB3773
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BLOCK DIAGRAM
VCC 5 Reference AMP . 1.24V 100 k + COMP.S + VS 7 40k Inhibit CK 3 Watch Dog Timer P.G 4 1 CT 8 RESET 2 RESET GND _ S _ Reference Voltage Generator 1.2A 1.24V + _ 10A 10A 6 VREF
COMP .O + _
R
Q
s
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol VCC IOL IOUT tWD tFC, tRC CT Ta Value +3.5 to +16 0 to 20 -200 to +5 0.1 to 1000 <100 0.001 to 10 -40 to +85 Unit V mA A ms s F C
Supply voltage Reset, reset sink current VREF output current Watch clock setting time Rising/falling time Terminal capacitance Operating ambient temperature
3
MB3773
s
(1)
ELECTORICAL CHARACTERISTICS
DC Characteristics
(VCC=5V, Ta=25C) Value Parameter Condition Watch dog timer operating VCC VSL Ta = -40C to +85C 4.05 4.20 VSH Ta = -40C to +85C 4.15 VHYS VREF VREF1 VREF2 VTH IIH IIL ICTD VOH1 VOH2 VOL1 VOL2 VOL3 VOL4 IOL1 IOL2 50 1.227 1.215 -5 0.8 -1.0 7 4.5 4.5 20 20 4.30 100 1.245 1.245 3 1.25 0 -0.1 10 4.9 4.9 0.2 0.3 0.2 0.3 60 60 4.45 150 1.263 V 1.275 10 +5 2.0 1.0 14 V VS = 0V, IRESET = -5A VS = 0V, IRESET = 3mA 0.4 0.5 V VS open, IRESET = 3mA VS open, IRESET = 10mA VS = 0V, VRESET = 1.0V 0.4 0.5 mA VS open, VRESET = 1.0V A mV mV V A mV 4.20 4.30 4.35 V VCC 4.40 Symbol Min Typ 600 4.20 Max 900 4.30 ICC 4.10 Unit A
Supply current
Detection voltage
Hysterisis width
VCC
Reference voltage Ta = -40C to +85C Reference voltage change rate Reference voltage output loading change rate CK threshold voltage CK input current VCK = 0.0V CK input current Watch dog timer operating VCT = 1.0V VS open, IRESET = -5A High level output voltage VCC = 3.5 to 16V IOUT = -200A to+5A Ta = -40C to +85C VCK = 5.0V
Output saturation voltage
VS = 0V, IRESET = 10mA
Output sink current
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MB3773
(1) DC Characteristics (Continued)
(VCC=5V, Ta=25C) Parameter CT charge current Min. supply voltage for RESET Min. supply voltage for RESET Condition Power on reset operating VCT = 1.0V VRESET = 0.4V IRESET = 0.2mA VRESET =VCC -0.1V RL (2 pin - GND) = 1M Symbol ICTU VCCL1 VCCL2 Value Min 0.5 Typ 1.2 0.8 0.8 Max 2.5 1.2 1.2 Unit A V V
(2)AC
Characteristics
(VCC=5V, Ta=25C) Parameter 5V VCC 4V CK or Condition Symbol Value Min 8.0 Typ Max Unit s s s ms ms ms
VCC input pulse width
TPI
CK input pulse width CK input frequency Watch dog timer watching time Watch dog timer reset time Rising reset hold time
TCKW TCK
3.0 20 5 1 50 -
10 2 100 2 3 1.0 0.1
15 3 150 10
CT = 0.1F CT = 0.1F CT = 0.1F, VCC RESET, RL = 2.2k CL = 100pF RESET, RL = 2.2k CL = 100pF RL = 2.2k CL = 100pF RL = 2.2k CL = 100pF
TWD TWR TPR TPD1 TPD2 tR tF
Output propagation Delay time from VCC
s 10 1.5 s 0.5
Output rising time * Output falling time *
* Output rising/falling time are measured at 10% to 90% of voltage.
5
MB3773
Fig. 1 - MB3773 Basic Operation
VCC VCC CT RESET RESET CK GND Logic Circuit RESET RESET CK TPR (ms) TWD (ms) TWR (ms) 1000 * CT 100 * CT 20 * CT (F) (F) (F) CT = 0.1F (100ms) (10ms) (2ms)
VCC VSH VSL 0.8V
CK
TCK CT
TPR RESET
TWD TWR
TPR
6
MB3773
s
TYPICAL CHARACTERISTIC CURVES
Fig. 2 - Supply current vs. supply voltage
0.75
Fig. 3 - Output voltag vs. supply voltage
(RESET pin) 6.0 Pull up 2.2k (V) 5.0 Ta = -40C, 25C, 85C 4.0 3.0 2.0 1.0
Ta = 85C Ta = 25C Ta = -40C
Supply current I cc (mA)
0.65 0.55 0.45 0.35 0.25 0.15 0 2.0 4.0
CT = 0.1F Ta = -40C Ta = 25C Ta = 85C
Output voltage V RESET
6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 Supply voltage VCC (V)
0
1.0
2.0 3.0 4.0 5.0 Supply voltage VCC (V)
6.0
7.0
Fig. 4 - Output voltag vs. supply voltage
(RESET pin) 6.0 Output voltage V RESET (V) 5.0 4.0 3.0 2.0 1.0 Ta = 85C Ta = 25C Ta = -40C 0 1.0 2.0 3.0 4.0 5.0 Supply voltage VCC (V) 6.0 7.0 Pull up 2.2k Detection voltage VSH , V SL (V) 4.50 4.44 4.30
Fig. 5 - Detection voltage (VSH, VSL) vs. temperature
(RESET, RESET pin)
VSH VSL
4.20 4.10 4.00
-40
-20
0 20 40 60 Temperature Ta (C)
80 100
Fig. 6 - Output saturation voltage vs. output sink current
(RESET pin) Output saturation voltage V OL2 (mV) Ta = -40C 400 CT = 0.1F Output saturation Voltage VOL8 (mV) 500 400
Fig. 7 - Output saturation voltage vs. output sink current
(RESET pin) CT = 0.1F Ta = -40C Ta = 25C Ta = 85C 200
300 200
Ta = 25C Ta = 85C
300
100
100
0
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 Output sink current IOL2 (mA)
0
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 Output sink current IOL8 (mA)
7
MB3773
s
TYPICAL CHARACTERISTIC CURVES (Continued)
Fig. 8 - High level output voltage vs. high level output current
5.0 High level output voltage V OH8 (V) (V) (RESET pin) CT = 0.1F 5.0
Fig. 9 - High level output voltage vs. high level output current
(RESET pin) CT = 0.1F Ta = 25 Ta = 85 4.5 Ta = -40C
High level output voltage V OH2
Ta = 25C 4.5 Ta = -40C Ta= 85C
4.0 0 -5 -10 High level output current IOH2 (A) -15
4.0 0 -5 -10 High level output current IOH8 (A) -15
Fig. 10 - Reference voltage vs. supply voltage
1.246 Reference voltage V REF (V) 1.244 1.242 1.240 1.238 1.236 1.234 0 3.0 5.0 7.0 9.0 11.0 13.0 15.0 17.0 19.0 21.0 Supply voltage VCC (V) Ta = 85C Ta = -40C Ta = 25C (V) 1.255
Fig. 11 - Reference voltage vs. reference current
CT = 0.1F 1.250 Ta= 25C 1.245 Ta= 85C Ta = -40C 1.240
CT = 0.1F
Reference voltage V
REF
0
-40
-80 -120 -160 -200 Reference current IREF (A)
-240
Fig. 12 - Reference voltage vs. temperature
1.27 160 Rising reset hold time T PR (msec) 1.26 Reference voltage V REF (V) 1.25 1.24 1.23 1.22 1.21 140 120 100 80 60 40 0 -40 -20 0 20 40 60 Temperature Ta(C) 80 100
Fig. 13 - Rising reset hold time vs. temperature
VCC = 5V CT = 0.1F
0
-40
-20
0 20 40 60 Temperature Ta(C)
80 100
8
MB3773
s
TYPICAL CHARACTERISTIC CURVES (Continued)
Fig. 14 - Reset time vs. temperature
(At watch dog timer) VCC = 5V CT = 0.1F Watch dog timer watching time T WD (msec) 3 Rwset time T WR (msec)
Fig. 15 - Watch dog timer watching time vs. temperature
16 14 12 10 8 6 4 0 -40 -20 0 20 40 60 80 100 Temperature Ta (C)
VCC = 5V CT = 0.1F
2
1
0 -40 -20 0 20 40 60 Temperature Ta (C) 80 100
Fig. 16 - Terminal capacitance vs. rising reset hold time
106 Rising reset hold time T PR (ms) 105
Fig. 17 - Terminal capacitance vs. reset time
(at watch dog timer) 10 Reset time T WR (ms)
2
Fig. 18 - Terminal capacitance vs. watch dog timer watching time
106 105 (ms) Watch dog timer watching time T WD 104 103 102 101 100 10-1 10-2 10-3 10-3 10-2 10-1 100 101 102 Terminal capacitance CT (F) Ta = 25C, 85C Ta = -40C
104 103 102 101 100 10-1 10-2 10-3 10-3 10-2 10-1 100 101 102 Terminal capacitance CT (F) Ta = 25C 85C Ta = -40C
101 100 10
-1
Ta = -40C
Ta= 25C, 85C
10-2 10-3 10 10 10 10 10 10
-3 -2 -1 0 1 2
Terminal capacitance CT (F)
9
MB3773
s
APPLICATION CIRCUIT
EXAMPLE 1 : Monitoring 5V Supply Voltage and Watch-dog Timer
VCC (5V) MB3773 1 2 3 CT 4 8 7 6 5 RESET RESET CK GND Logic circuit
* Supply voltage is monitored using Vs. Detection voltage are VSH and VSL.
EXAMPLE 2 : 5V Supply Voltage Monitoring (external fine-tuning type)
VCC (5V) MB3773 1 2 3 CT 4 8 7 6 5 R2 R1 RESET RESET CK GND Logic circuit
* Vs detection voltage can be adjusted externally. * Selecting R1 and R2 values that are sufficiently lower than the resistance of the IC's internal voltage divider allows the detection voltage to be set according to the resistance ratio between R1 and R2. (See the table below.)
R1 (k) 10 9.1 R2 (k) 3.9 3.9 Detection voltage:VSL (V) 4.4 4.1 Detection voltage:VSH (V) 4.5 4.2
10
MB3773
EXAMPLE 3 : With Forced Reset (with reset hold)
a VCC MB3773 1 2 3 CT 4 8 7 6 5 SW RESET RESET CK GND Logic circuit
* Grouding pin 7 at the time of SW ON sets RESET (pin 8) to Low and RESET (pin 2) to High.
b VCC MB3773 1 2 3 Cr 4 8 7 6 5 10k Tr 10k RESET RESET CK GND Logic circuit
RESIN
* Feeding the signal to pin RESIN and turning on Tr sets the RESET pin to Low and the RESET pin to High.
11
MB3773
EXAMPLE 4 : Montitoring Two Supply Voltages (with hysterisis, reset output and NMI)
VCC2(12V) VCC1 (5V)
MB3773 1 2 CT 3 4 8 7 6 5 100k R3 180k R4 + _ 1.2k R1 Comp. 1 Comp. 2 + _ 10k R6 RESET RESET CK
Logic circuit
NMI or port GND
5.1k R2
4.7k R5
Example
: Comp. 1, Comp. 2 : MB4204, MB47393
NOTE: The 5V supply voltage is monitored by the MB3773. The 12V supply viltage is monitored by the external circuit. Its output is connected to the NMI pin and, when voltage drops, Comp. 2 interrrupts the logic circuit. * Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. * The detection voltage of the VCC2 (=12V) supply voltage is approximately 0.2V. VCC2 detection voltage and hysterisis width can be found using the following formulas:
Detection voltage
V2H = V2L =
R3 + (R4 // R5) x VREF R4 // R5 (Approx. 9.4V in the above illustration) (Approx. 9.2V in the above illustration)
R3 + R5 x VREF R5
Hysterisis width
VHYS = V2H - V2L
12
MB3773
EXAMPLE 5 : Montitoring Two (M) Supply Voltages (with hysterisis and reset output)
VCC2 (12V) VCC1 (5V) 20k R6 8 7 6 5 30k R3 180k R4 + _ 1.2k R1 Comp. 1 Comp. 2 + _ Diode RESET RESET CK GND
MB3773 1 2 CT 3 4
Logic circuit
5.1k R2
4.7k R5
Example
: Comp. 1, Comp. 2 : MB4204, MB47393
NOTE: When either 5V or 12V supply voltage decreases below its detection voltage (VSL), the MB3773 RESET pin is set to High and the MB3773 RESET pin is set to Low. * Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. * The detection voltage of the VCC2 (=12V) supply voltage is approximately 9.2V/9.4V and has a hysterisis width of approximately 0.2V. For the formulas for finding hysterisis width and detection voltage, see section 4.
13
MB3773
EXAMPLE 6 : Montitoring Low voltage and Overvoltage Monitoring (with hysterisis)
VCC (5V) 20k R6 8 7 6 5 30k R3 180k R4 _ _ + 1.2k R1 Comp. 1 + Comp. 2 Diode RESET RESET CK GND
MB3773 1 2 CT 3 4
Logic circuit
5.6k R2
4.7k R5
Example
RESET
: Comp. 1, Comp. 2 : MB4204, MB47393
0
VCC V1L V1H V2L V2H
* Comp. 1 and Comp. 2 are used to monitor for overvoltage while the MB3773 is used to monitor for low voltage. Detection voltages V1/V1H at the time of low voltage areappoximately 4.2V/4.3V. Detection voltages V2L/V2H at the time of overvoltage are approximately 6.0V/6.1V. For the formulas for finding hysterisis width and detection voltage, see section 4. * Use VCC (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above.
14
MB3773
EXAMPLE 7 : Monitoring Supply Voltage Using Delayed Trigger
VCC 5V 4V
VCC
MB3773 1 CT 2 3 4 8 7 6 5 C1 RESET RESET CK GND
Logic circuit
* Adding voltage such as shown in the figure to VCC increases the minimum input pulse width by 50 microseconds (C1 = 1000pF).
15
MB3773
EXAMPLE 8 : Stopping Watch-dog Timer (Monitering only supply voltage) These are example application circuts in which the MB3773 monitors supply voltage alone without resetting the microcomputer even if the latter, used in standby mode, stops sending the clock pulse to the MB3773. *The watch-dog timer is inhibited by clamping the Cr pin voltage to VREF . The supply voltage is constantly monitored even while the watch-dog timer is inhibited. For this reason, a reset signal is output at the occurrence of either instataneous disruption or a sudden drop to low voltage. Note that in application examples a and b, the hold signal is inactive when the watch-dog timer is inhibited at the time of resetting. If the hold signal is active when tie microcomputer is reset, the solution is to add a gate, as in examples c and d. a Using NPN transistor
VCC(5V)
MB3773 1 2 3 4 8 7 6 5 RESET RESET CK HALT GND R2=1k R1=1M
Logic circuit
CT
b Using PNP transistor
VCC (5V)
MB3773 1 2 3 4 8 7 6 5 RESET RESET CK HALT GND R2=1k R1=51k
Logic circuit
CT
(Continued)
16
MB3773
(Continued)
c Using NPN transistor
VCC (5V)
MB3773 1 2 3 4 8 7 6 5 R1=1M RESET RESET CK HALT GND R2=1k
Logic circuit
CT
d Using PNP transistor
VCC (5V)
MB3773 1 2 3 4 8 7 6 5 R1=51k RESET RESET CK HALT GND R2=1k
Logic circuit
CT
17
MB3773
EXAMPLE 9 : Reducing Reset Hold Time
VCC(=5V) VCC (=5V)
MB3773 1 2 CT 3 4 8 7 6 5 RESET RESET CK GND
Logic circuit 1 2 CT 3 4
MB3773 8 7 6 5 RESET RESET CK
Logic circuit
GND
(a) TPR reduction method
(b) Standard usage
* RESET is the only output that can be used. * Standard TPR, TWD and TWR value can be found using the following formulas. Formulas : TPR (ms) 100 x CT (F) TWD (ms) 100 x CT (F) TWR (ms) 16 x CT (F) * The above formulas allow fo standard values in determining TPR, TWD and TWR. Reset hold time is compared below between the reduction circuit and the standard circuit.
CT = 0.1F TPR reduction circuit TPR TWD TWR 10ms 10ms 1.6ms Standard circuit 100ms 10ms 2.0ms
18
MB3773
EXAMPLE 10 : Circuit for Monitoring Multiple Microcomputers
VCC (=5V)
FF1 S D1 Q1
FF2 S D2 Q2
FF3 S D3 Q3
CK1 Q1 R
CK2 Q2 R
CK3 Q3 R R2
R1
RESET RESET CK GND
RESET RESET CK GND
RESET RESET CK GND
1 2 CT 3 4
8 7 6 5
MB3773
Figure 1
*
connects from FF1 and FF2 outputs Q1 and Q2 to the NOR input. Depending on timing, these connections may not be necessary. Example:R1 = R2 = 2.2k CT = 0.1F
CK1
Q1
CK2
Q2
CK3
Q3
NOR Output
Figure 2
19
MB3773
Description of Application Circuits Using one MB3773, this application circuit monitors multiple microcomputers in one system. Signals from each microcomputer are sent to FF1, FF2 and FF3 clock inputs. Figure 2 shows these timings. Each flip-flop operates using signals sent from microcomputers as its clock pulse. When even one signal stops, the relevant receiving flip-flop stops operating. As a result, cyclical pulses are not generated at output Q3. Since the clock pulse stops arriving at the CK pin of the MB3773, the MB3773 generates a reset signal. Note that output Q3 frequncy f will be in the following range, where the clock frequencies of CK1, CK2 and CK3 are f1, f2 and f3 respectively.
11111 --- -- --- + --- + ---f0 f f1 f2 f3
where f0 is the lowest frequency among f1, f2 and f3.
20
MB3773
EXAMPLE 11 : Circuit for Limiting Upper Clock Input Frequency
VCC (5V) R2 1 2 CT 3 4 8 7 6 5 Tr1 C2 R1=10k CK GND RESET RESET
* This is an example application to limit upper frequency fH of clock pulses sent from the microcomputer. If the CK cycle sent from the microcomputer exceeds fH, the circuit generates a reset signal. (The lower freqency has already been set using Cr.) * When a clock pulse such as shown below is sent to pin CK, a short T2 prevents C2 voltage from reaching the CK input threshold level ( 1.25V), and will cause a reset signal to be output. The T1 value can be found using the following formula : 0.3 C2R2
T2
T1
CK waveform T3
where VCC = 5V, T3 3.0sec, T2 20sec
C2 voltage T1
Example : Setting C and R allow the upper T1 value to be set (See the table below.) C 0.01F 0.1F R 10k 10k T1 30s 300s
21
MB3773
s
PACKAGE DIMENSIONS
8 pin, Plastic DIP (DIP-8P-M01)
9.40 -0.30
+0.40 +.016
.370 -.012
1 PIN INDEX
6.200.25 (.244.010)
4.36(.172)MAX
0.51(.020)MIN 0.250.05 (.010.002)
3.00(.118)MIN
0.460.08 (.018.003)
+0.30 +.012
0.99 -0
+0.30 +.012
1.52 -0
.039 -0 +0.35 0.89 -0.30
.035 -.012
+.014
.060 -0 2.54(.100) TYP
7.62(.300) TYP
15MAX
Dimensions in mm (inches).
C
1994 FUJITSU LIMITED D08006S-2C-3
22
MB3773
s
PACKAGE DIMENSIONS (Continued)
8 pin, Plastic SOP (FPT-8P-M01)
2.25(.089)MAX 6.35 -0.20 .250 -.008
+0.25 +.010
0.05(.002)MIN (STAND OFF)
INDEX
5.300.30 (.209.012)
7.800.40 (.307.016)
6.80 -0.20 +.016 .268 -.008
+0.40
1.27(.050) TYP 3.81(.150)REF
0.450.10 (.018.004)
O0.13(.005)
M
0.15 -0.02 +.002 .006 -.001
+0.05
0.500.20 (.020.008)
Details of "A" part 0.20(.008)
0.50(.020) "A" 0.10(.004) 0.18(.007)MAX 0.68(.027)MAX
Dimensions in mm (inches).
C
1994 FUJITSU LIMITED F08002S-4C-4
23
MB3773
s
PACKAGE DIMENSIONS (Continued)
8 pin, Plastic SIP (SIP-8P-M03)
19.65 -0.35
+0.15 +.006
3.260.25 (.128.010)
.774 -.014
INDEX-1 6.200.25 (.244.010) 8.200.30 (.323.012)
INDEX-2
0.99 -0
+0.30 +.012
.039 -0
4.000.30 (.157.012)
2.54(.100) TYP
1.52 -0
+0.30 +.012
.060 -0
0.500.08 (.020.003)
0.250.05 (.010.002)
Dimensions in mm (inches).
C
1994 FUJITSU LIMITED S08010S-3C-2
24
MB3773
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: (044) 754-3763 Fax: (044) 754-3329
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.
http://www.fujitsu.co.jp/
North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
http://www.fmap.com.sg/
F9803 (c) FUJITSU LIMITED Printed in Japan
25

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